Digital Signal Processing implementation on chip using VLSI Design techniques
     
within the
5th WSEAS International Conference on
SIGNAL PROCESSING (SIP '06)
Istanbul, Turkey, May 27-29, 2006
http://www.worldses.org/conferences/2006/istanbul/signal

Topics:

  • Digital Video Processing Algorithms

  • Low-power circuit design for high performance systems

  • Video compression and low power circuit design

  • Micro mirror Design and fabrication for 3D display systems (3D TV)

  • Multi-standard Digital Receivers

  • Multirate

  • Genomic Digital Signal Processing

  • DSP, Energy-Aware Communication protocols for Sensor Networks and System-on-Chip

  • DSP and VLSI architectures for wireless communication

  • On Chip Cryptography

  • Low power VLSI Architecture, Digital Circuits Design, Reconfigurable SoC, Error Correcting Codes (LDPC)

  • On-chip communication architecture design, FPGA implementation for SOC architecture, image compression and quantization

  • Parallel image processing, cross-layer design for wireless networks, and energy efficient adaptive physical layer

  • Low-power SRAM Design , Digital Design Verification using FPGA, Performance Degradation in Sub- micron CMOS Technology, Single Electron transistor application in VLSI Circuit


     

Organizer:

Dr. Junaid Majeed, Senior Lecturer FEST, Hamdard University, Muhammad bin qasim avenue , shahara madina-ul-hikmah ,Karachi, Tel:+92-21-6440114 Fax: +92-21-6440130, Email: Junaid.majeed@hamdard.edu.pk

 


 HOW TO SUBMIT:

 

You can submit via the web site of the conference:
please, click here, fill in the web form writing the title of your Session in the appropriate field 
 


 IMPORTANT DATES and MORE INFORMATION FOR THE SESSION:


 http://www.worldses.org/conferences/2006/istanbul/signal

 

Brief Biography of the Organizer:

Eng. Junaid Majeed has been working as lecturer and researcher at FEST since 2002. He has written various papers on VLSI and implementation of secure communication algorithms on chip. He has been supervising many undergraduate theses in the field of VLSI and parallel processing. Currently he has been working as co- author on book.